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1/17 july 2004 low r ds(on) : 4 ? typ 30mj availanche energy eight 100ma dmos outputs 250ma current limit capability 33v output clamp voltage device are cascadable low power consumption description this STPIC6C595 is a monolithic, medium-voltage, low current power 8-bit shift register designed for use in systems that require relatively moderate load power such as leds. the device contains a built-in voltage clamp on the outputs for inductive transient protection. power driver applications include relays, solenoids, and other low-current or medium-voltage loads. the device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit d-type storage register. data transfers through both the shift and storage register clock (srck) and the register clock (rck ), respectively. the device transfers data out the serial output (ser out) port on the rising edge of srck. the storage register transfers data to the output buffer when shift register clear (clr) is high. when clr is low, the input shift register is cleared. when output enable (g ) is held high, all data in the output buffer is held low and all drain output are off. when g is held low, data from the storage register is transparent to the output buffer. when data in the output buffers is low, the dmos transistor outputs are off. when data is high, the dmos transistor outputs have sink-current capability. the ser out allows for cascading of the data from the shift register to additional devices. output are low-side, open-drain dmos transistors with output ratings of 33v and 100ma continuous sink-current capability. each output provides a 250 ma maximum current limit at t c = 25c. the current limit decreases as the junction temperature increases for additional device protection. the device also provides up to 1.5kv of esd protection when tested using the human-body model and 200v machine model. the STPIC6C595 is characterized for operation over the operating case temperature range of -40c to 125c. ordering codes type package comments STPIC6C595m so-16 (tube) 50parts per tube / 20tube per box STPIC6C595mtr so-16 (tape & reel) 2500 parts per reel STPIC6C595ttr tssop16 (tape & reel) 2500 parts per reel STPIC6C595 power logic 8-bit shift register sop tssop rev. 2
STPIC6C595 2/17 figure 1: logic symbol and pin configuration figure 2: input and output equivalent circuits
STPIC6C595 3/17 table 1: absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditi on is not implied. table 2: thermal data table 3: recommended operating conditions symbol parameter value unit v cc logic supply voltage (see note 1) 7v v i logic input voltage range -0.3 to 7 v v ds power dmos drain to source voltage (see note 2) 33 v i ds continuous source to drain diode anode current 250 ma i ds pulsed source to drain diode anode current (see note 3) 500 ma i d pulsed drain current, each output, all output on (t c =25c) 250 ma i d continuous current, each output, all output on (t c =25c) 100 ma i d peak drain current single output (t c =25c) (see note 3) 250 ma e as single pulse avalanche energy (see figure11 and 12) 30 mj i as avalanche current (see note 4 and figure 17) 200 ma p d continuous total dissipation (t c 25c) 1087 mw p d continuous total dissipation (t c = 125c) 217 mw t j operating virtual junction temperature range -40 to +150 c t c operating case temperature range -40 to +125 c t stg storage temperature range -65 to +150 c t l lead temperature 1.6mm (1/16inch) from case for 10 seconds 260 c symbol parameter value unit r thj-amb thermal resistance junction-ambient 115 c/w symbol parameter min. max. unit v cc logic supply voltage 4.5 5.5 v v ih high level input voltage 0.85v cc v cc v v il low level input voltage 0 0.15v cc v i dp pulse drain output current (t c =25c, v cc =5v,all outputs on) (see note 3, 5 and figure 15) 250 ma t su set-up time, ser in high before srck (see figure 6 and 8) 20 ns t h hold time, ser in high before g (see figure 6, 7, 8) 20 ns t w pulse duration (see figure 8) 40 ns t c operating case temperature -40 125 c
STPIC6C595 4/17 table 4: dc characteristics (v cc =5v, t c = 25c, unless otherwise specified.) table 5: switching characteristics (v cc =5v, t c = 25c, unless otherwise specified.) note 1: all voltage value are with respect to gnd note 2: each power dmos source is internally connected to gnd note 3: pulse duration 100 s and duty cycle 2% note 4: drain supply voltage = 15v, starting junction temperature (t js ) = 25c. l = 1.5h and i as = 200ma (see fig. 11 and 12) note 5: technique should limit t j - t c to 10c maximum note 6: these parameters are measured with voltage sensing contacts separate from the current-carrying contacts. note 7: nominal current is defined for a consistent comparison between devices from different sources. it is the current that p roduces a volt- age drop of 0.5v at t c = 85c. symbol parameter test conditions min. typ. max. unit v (br)dsx drain-to-source breakdown voltage i d = 1ma 33 37 v v sd source-to-drain diode forward voltage i f = 100 ma 0.85 1.2 v v oh high level output voltage ser out i oh = -20 av cc = 4.5v 4.4 4.49 v i oh = -4 ma v cc = 4.5v 4 4.2 v v ol low level output voltage ser out i oh = 20 av cc = 4.5v 0.005 0.1 v i oh = 4 ma v cc = 4.5v 0.3 0.5 v i ih high level input current v cc = 5.5v v i = v cc 1 a i il low level input current v cc = 5.5v v i = 0 -1 a i cc logic supply current v cc = 5.5v all outputs off or on 20 200 a i cc(frq) logic supply current at frequency f srck = 5mhz c l = 30pf all outputs off (see figg. 6, 18 and 19) 0.2 2 ma i n nominal current v ds(on) = 0.5v i n = i d t c =85c (see note 5, 6, 7) 90 ma i dsx off-state drain current v ds = 30v v cc = 5.5v 0.3 5 a v ds = 30v v cc =5.5v or 0v t c =125c 0.6 8 a r ds(on) static drain source on state resistance (see note 5, 6 and figg. 14, 16) i d = 50ma v cc = 4.5v 4.5 6 ? i d = 50ma v cc = 4.5v t c =125c 6.5 9 ? i d = 100ma v cc = 4.5v 4.5 6 ? symbol parameter test conditions min. typ. max. unit t phl propagation delay time, high to low level output from g c l = 30pf i d = 75ma (see figg. 4, 5, 6,7, 20) 80 ns t plh propagation delay time, low to high level output from g 130 ns t r rise time, drain output 60 ns t f fall time, drain output 50 ns t pd propagation delay time 20 ns t a reverse recovery current rise time i f = 100ma di/dt = 10a/ s (see note 5, 6 and fig. 9 and 10) 39 ns t rr reverse recovery time 115 ns
STPIC6C595 5/17 figure 3: logic diagram
STPIC6C595 6/17 figure 4: typical operation mode test circuits figure 5: typical operation mode waveforms note: a) the word generator has the following characteristics: t r 10ns, t f 10ns, t w = 300ns, pulse repetition rate (prr) = 5khz, z o = 50 ? b) c l includes probe and jig capacitance.
STPIC6C595 7/17 figure 6: typical operation mode test circuits figure 7: switching time waveform figure 8: input setup and hold waveform note: a) the word generator has the following characteristics: t r 10ns, t f 10ns, t w = 300ns, pulse repetition rate (prr) = 5khz, z o = 50 ? b) c l includes probe and jig capacitance.
STPIC6C595 8/17 figure 9: reverse recovery current test circuits figure 10: source drain diode waveform note: a) the v gg amplitude and r g are adjusted for di/dt = 10a/ s. a v gg double-pulse train is used to set i f = 0.1a. where t 1 = 10 s, t 2 = 7 s and t 3 = 3 s b) the drain terminal under test is connected to the tpk test point. all other terminals are connected together and connected t o the tpa test point. c) i rm = maximum recovery current.
STPIC6C595 9/17 figure 11: single pulse avalanche energy test circuits figure 12: single pulse avalanche energy waveform note: a) the word generator has the following characteristics: t r 10ns, t f 10ns, z o = 50 ? b) input pulse duration, t w is increased until peak current i as = 200 ma. energy test level is defined as e as = (i as x v (br)dsx x t av )/2 = 30mj.
STPIC6C595 10/17 typical performance characteristics (unless otherwise specified t j = 25c) figure 13: max continuous drain current vs number of outputs conducting simultaneously figure 14: static drain-source on-state resistance vs drain current figure 15: maximum peak drain current vs number of outputs conducting simultaneously figure 16: static drain-source on-state resistance vs logic supply voltage figure 17: peak avalanche current vs time duration of avalanche figure 18: supply current vs frequency
STPIC6C595 11/17 figure 19: supply current vs supply voltage figure 20: switching time vs case temperature figure 21: normalized junction to ambient thermal resistance
STPIC6C595 12/17 dim. mm. inch min. typ max. min. typ. max. a 1.75 0.068 a1 0.1 0.25 0.004 0.010 a2 1.64 0.063 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.5 0.019 c1 45 (typ.) d 9.8 10 0.385 0.393 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 f 3.8 4.0 0.149 0.157 g 4.6 5.3 0.181 0.208 l 0.5 1.27 0.019 0.050 m 0.62 0.024 s8 (max.) so-16 mechanical data 0016020d
STPIC6C595 13/17 dim. mm. inch min. typ max. min. typ. max. a 1.2 0.047 a1 0.05 0.15 0.002 0.004 0.006 a2 0.8 1 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0079 d 4.9 5 5.1 0.193 0.197 0.201 e 6.2 6.4 6.6 0.244 0.252 0.260 e1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 bsc 0.0256 bsc k0? 8?0? 8? l 0.45 0.60 0.75 0.018 0.024 0.030 tssop16 mechanical data c e b a2 a e1 d 1 pin 1 identification a1 l k e 0080338d
STPIC6C595 14/17 dim. mm. inch min. typ max. min. typ. max. a 330 12.992 c 12.8 13.2 0.504 0.519 d 20.2 0.795 n 60 2.362 t 22.4 0.882 ao 6.45 6.65 0.254 0.262 bo 10.3 10.5 0.406 0.414 ko 2.1 2.3 0.082 0.090 po 3.9 4.1 0.153 0.161 p 7.9 8.1 0.311 0.319 tape & reel so-16 mechanical data
STPIC6C595 15/17 dim. mm. inch min. typ max. min. typ. max. a 330 12.992 c 12.8 13.2 0.504 0.519 d 20.2 0.795 n 60 2.362 t 22.4 0.882 ao 6.7 6.9 0.264 0.272 bo 5.3 5.5 0.209 0.217 ko 1.6 1.8 0.063 0.071 po 3.9 4.1 0.153 0.161 p 7.9 8.1 0.311 0.319 tape & reel tssop16 mechanical data
STPIC6C595 16/17 table 6: revision history date revision description of changes 07-jul-2004 2 update fig. 3, pag. 5.
STPIC6C595 17/17 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com

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